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UMC2NT1, UMC3NT1, UMC5NT1
Preferred Devices
Dual Common Base-Collector Bias Resistor Transistors
NPN and PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network
The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base-emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminates these individual components by integrating them into a single device. In the UMC2NT1 series, two complementary BRT devices are housed in the SOT-353 package which is ideal for low power surface mount applications where board space is at a premium.
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3 R1 2 R2 1
R2 Q1 R1 4
Q2
5
* * * *
Simplifies Circuit Design Reduces Board Space Reduces Component Count Available in 8 mm, 7 inch/3000 Unit Tape and Reel.
SC-88A/SOT-323 CASE 419A STYLE 6
MARKING DIAGRAM
5 Ux 1 2 3 4
MAXIMUM RATINGS (TA = 25C unless otherwise noted, common for Q1
and Q2, - minus sign for Q1 (PNP) omitted) Rating Collector-Base Voltage Collector-Emitter Voltage Collector Current Symbol VCBO VCEO IC Value 50 50 100 Unit Vdc Vdc mAdc
Ux = Device Marking x = 2, 3 or 5
THERMAL CHARACTERISTICS
Thermal Resistance - Junction-to-Ambient (surface mounted) Operating and Storage Temperature Range Total Package Dissipation @ TA = 25C (Note 1.) RJA TJ, Tstg PD 833 -65 to +150 *150 C/W C mW
ORDERING INFORMATION
Device UMC2NT1 UMC3NT1 UMC5NT1 Package SOT-323 SOT-323 SOT-323 Shipping 3000/Tape & Reel 3000/Tape & Reel 3000/Tape & Reel
DEVICE MARKING AND RESISTOR VALUES
Transistor 1 - PNP Device UMC2NT1 UMC3NT1 UMC5NT1 Marking U2 U3 U5 R1 (K) 22 10 4.7 R2 (K) 22 10 10 Transistor 2 - NPN R1 (K) 22 10 47 R2 (K) 22 10 47
Preferred devices are recommended choices for future use and best overall value.
1. Device mounted on a FR-4 glass epoxy printed circuit board using the minimum recommended footprint.
(c) Semiconductor Components Industries, LLC, 2001
1
April, 2001 - Rev. 1
Publication Order Number: UMC2NT1/D
UMC2NT1, UMC3NT1, UMC5NT1
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
Q1 TRANSISTOR: PNP
OFF CHARACTERISTICS
Collector-Base Cutoff Current (VCB = 50 V, IE = 0) Collector-Emitter Cutoff Current (VCB = 50 V, IB = 0) Emitter-Base Cutoff Current (VEB = 6.0, IC = 5.0 mA) UMC2NT1 UMC3NT1 UMC5NT1 ICBO ICEO IEBO - - - - - - - - - - 100 500 0.2 0.5 1.0 nAdc nAdc mAdc
ON CHARACTERISTICS
Collector-Base Breakdown Voltage (IC = 10 A, IE = 0) Collector-Emitter Breakdown Voltage (IC = 2.0 mA, IB = 0) DC Current Gain (VCE = 10 V, IC = 5.0 mA) UMC2NT1 UMC3NT1 UMC5NT1 V(BR)CBO V(BR)CEO hFE 50 50 60 35 20 - - 4.9 15.4 7.0 3.3 0.8 0.8 0.38 - - 100 60 35 - - - 22 10 4.7 1.0 1.0 0.47 - - - - - 0.25 0.2 - 28.6 13 6.1 1.2 1.2 0.56 Vdc Vdc Vdc kW Vdc Vdc
Collector-Emitter Saturation Voltage (IC = 10 mA, IB = 0.3 mA) Output Voltage (on) (VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW) Output Voltage (off) (VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kW) Input Resistor UMC2NT1 UMC3NT1 UMC5NT1 UMC2NT1 UMC3NT1 UMC5NT1
VCE(SAT) VOL VOH R1
Resistor Ratio
R1/R2
Q2 TRANSISTOR: NPN
OFF CHARACTERISTICS
Collector-Base Cutoff Current (VCB = 50 V, IE = 0) Collector-Emitter Cutoff Current (VCB = 50 V, IB = 0) Emitter-Base Cutoff Current (VEB = 6.0, IC = 5.0 mA) UMC2NT1 UMC3NT1 UMC5NT1 ICBO ICEO IEBO - - - - - - - - - - 100 500 0.2 0.5 0.1 nAdc nAdc mAdc
ON CHARACTERISTICS
Collector-Base Breakdown Voltage (IC = 10 A, IE = 0) Collector-Emitter Breakdown Voltage (IC = 2.0 mA, IB = 0) DC Current Gain (VCE = 10 V, IC = 5.0 mA) UMC2NT1 UMC3NT1 UMC5NT1 V(BR)CBO V(BR)CEO hFE 50 50 60 35 80 - - 4.9 15.4 7.0 33 0.8 0.8 0.8 - - 100 60 140 - - - 22 10 47 1.0 1.0 1.0 - - - - - 0.25 0.2 - 28.6 13 61 1.2 1.2 1.2 Vdc Vdc Vdc kW Vdc Vdc
Collector-Emitter Saturation Voltage (IC = 10 mA, IB = 0.3 mA) Output Voltage (on) (VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW) Output Voltage (off) (VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kW) Input Resistor UMC2NT1 UMC3NT1 UMC5NT1 UMC2NT1 UMC3NT1 UMC5NT1
VCE(SAT) VOL VOH R1
Resistor Ratio
R1/R2
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UMC2NT1, UMC3NT1, UMC5NT1
250 PD , POWER DISSIPATION (MILLIWATTS) 200
150 100 50 0 -50 RJA = 833C/W
0 50 100 TA, AMBIENT TEMPERATURE (C)
150
Figure 1. Derating Curve
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UMC2NT1, UMC3NT1, UMC5NT1
TYPICAL ELECTRICAL CHARACTERISTICS -- UMC2NT1 PNP TRANSISTOR
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) 10 IC/IB = 10 hFE, DC CURRENT GAIN 1000
VCE = 10 V
1 TA = -25C
25C
TA = 75C 100
25C
-25C
75C 0.1
0.01
0
20 IC, COLLECTOR CURRENT (mA)
40
50
10
1
10 IC, COLLECTOR CURRENT (mA)
100
Figure 2. VCE(sat) versus IC
Figure 3. DC Current Gain
4 IC, COLLECTOR CURRENT (mA) f = 1 MHz lE = 0 mA TA = 25C
100 75C 10
25C TA = -25C
Cob , CAPACITANCE (pF)
3
1
2
0.1
1
0.01 0 1 2 3 4 5 6 7 Vin, INPUT VOLTAGE (VOLTS) 8
VO = 5 V 9 10
0
0
10 20 30 40 VR, REVERSE BIAS VOLTAGE (VOLTS)
50
0.001
Figure 4. Output Capacitance
Figure 5. Output Current versus Input Voltage
100 V in , INPUT VOLTAGE (VOLTS)
VO = 0.2 V TA = -25C
10 75C
25C
1
0.1
0
10
20 30 IC, COLLECTOR CURRENT (mA)
40
50
Figure 6. Input Voltage versus Output Current
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UMC2NT1, UMC3NT1, UMC5NT1
TYPICAL ELECTRICAL CHARACTERISTICS -- UMC2NT1 NPN TRANSISTOR
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) 1 IC/IB = 10 TA = -25C hFE, DC CURRENT GAIN 25C 0.1 75C 1000 VCE = 10 V TA = 75C 25C -25C 100
0.01
0.001
0
20 40 IC, COLLECTOR CURRENT (mA)
50
10
1
10 IC, COLLECTOR CURRENT (mA)
100
Figure 7. VCE(sat) versus IC
Figure 8. DC Current Gain
4 f = 1 MHz IE = 0 mA TA = 25C
100 75C IC, COLLECTOR CURRENT (mA) 10 1 0.1 0.01
25C TA = -25C
Cob , CAPACITANCE (pF)
3
2
1
VO = 5 V 0 1 2 3 4 5 6 7 Vin, INPUT VOLTAGE (VOLTS) 8 9 10
0
0
10 20 30 40 VR, REVERSE BIAS VOLTAGE (VOLTS)
50
0.001
Figure 9. Output Capacitance
Figure 10. Output Current versus Input Voltage
10 VO = 0.2 V V in , INPUT VOLTAGE (VOLTS) TA = -25C 25C 75C 1
0.1
0
10
20 30 IC, COLLECTOR CURRENT (mA)
40
50
Figure 11. Input Voltage versus Output Current
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UMC2NT1, UMC3NT1, UMC5NT1
TYPICAL ELECTRICAL CHARACTERISTICS -- UMC3NT1 PNP TRANSISTOR
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) 1 IC/IB = 10 hFE , DC CURRENT GAIN 1000
VCE = 10 V
TA = -25C 0.1 75C 25C
TA = 75C 100 25C -25C
0.01
0
20 IC, COLLECTOR CURRENT (mA)
40
50
10
1
10 IC, COLLECTOR CURRENT (mA)
100
Figure 12. VCE(sat) versus IC
Figure 13. DC Current Gain
4 f = 1 MHz lE = 0 mA TA = 25C
100
75C
25C TA = -25C
Cob , CAPACITANCE (pF)
3
IC, COLLECTOR CURRENT (mA)
10 1
2
0.1
1
0.01 0.001 0 1 2
VO = 5 V 3 4 5 6 7 Vin, INPUT VOLTAGE (VOLTS) 8 9 10
0
0
10 20 30 40 VR, REVERSE BIAS VOLTAGE (VOLTS)
50
Figure 14. Output Capacitance
Figure 15. Output Current versus Input Voltage
100
VO = 0.2 V
V in , INPUT VOLTAGE (VOLTS)
10
TA = -25C 25C 75C
1
0.1
0
10
20 30 IC, COLLECTOR CURRENT (mA)
40
50
Figure 16. Input Voltage versus Output Current
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UMC2NT1, UMC3NT1, UMC5NT1
TYPICAL ELECTRICAL CHARACTERISTICS -- UMC3NT1 NPN TRANSISTOR
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) 1 IC/IB = 10 TA = -25C hFE, DC CURRENT GAIN 25C 75C 1000
VCE = 10 V TA = 75C 25C -25C
0.1
100
0.01
0.001
0
20 IC, COLLECTOR CURRENT (mA)
40
50
10
1
10 IC, COLLECTOR CURRENT (mA)
100
Figure 17. VCE(sat) versus IC
Figure 18. DC Current Gain
4 f = 1 MHz IE = 0 mA TA = 25C
100 IC, COLLECTOR CURRENT (mA) 10 1 0.1 0.01
75C
25C TA = -25C
Cob , CAPACITANCE (pF)
3
2
1
VO = 5 V 0 0 10 20 30 40 VR, REVERSE BIAS VOLTAGE (VOLTS) 50 0.001 0 2 4 6 Vin, INPUT VOLTAGE (VOLTS) 8 10
Figure 19. Output Capacitance
Figure 20. Output Current versus Input Voltage
100 VO = 0.2 V V in , INPUT VOLTAGE (VOLTS) TA = -25C 10 75C 25C
1
0.1
0
10
20
30
40
50
IC, COLLECTOR CURRENT (mA)
Figure 21. Input Voltage versus Output Current
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UMC2NT1, UMC3NT1, UMC5NT1
TYPICAL ELECTRICAL CHARACTERISTICS -- UMC5NT1 PNP TRANSISTOR
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) 1 IC/IB = 10 hFE, DC CURRENT GAIN 100 1000 VCE = 10 V TA = 75C -25C
25C
TA = 75C 0.1 -25C
25C
10
0.01
0
10
20
30
40
50
60
1
1
10
100
1000
IC, COLLECTOR CURRENT (mA)
IC, COLLECTOR CURRENT (mA)
Figure 22. VCE(sat) versus IC
Figure 23. DC Current Gain
12 10 Cob , CAPACITANCE (pF) 8 6 4 SERIES 1 2 0 0 5 10 20 30 15 25 35 VR, REVERSE BIAS VOLTAGE (VOLTS) 40 45 f = 1 MHz IE = 0 mA TA = 25C
100 IC, COLLECTOR CURRENT (mA) 75C
10
1 VO = 5 V TA = -25C 25C 0 2 4 6 8 Vin, INPUT VOLTAGE (VOLTS) 10 12
0.1
0.01
Figure 24. Output Capacitance
Figure 25. Output Current versus Input Voltage
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UMC2NT1, UMC3NT1, UMC5NT1
TYPICAL ELECTRICAL CHARACTERISTICS -- UMC5NT1 NPN TRANSISTOR
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) 10 IC/IB = 10 hFE, DC CURRENT GAIN 1000
VCE = 10 V TA = 75C 25C -25C
1 TA = -25C 0.1 25C 75C
100
0.01
0
20 40 IC, COLLECTOR CURRENT (mA)
50
10
1
10 IC, COLLECTOR CURRENT (mA)
100
Figure 26. VCE(sat) versus IC
Figure 27. DC Current Gain
1 0.8 Cob , CAPACITANCE (pF) 0.6 0.4 0.2 0
IC, COLLECTOR CURRENT (mA)
f = 1 MHz IE = 0 mA TA = 25C
100 75C 10 1 0.1 0.01
25C TA = -25C
VO = 5 V 0 2 4 6 Vin, INPUT VOLTAGE (VOLTS) 8 10
0
10 20 30 40 VR, REVERSE BIAS VOLTAGE (VOLTS)
50
0.001
Figure 28. Output Capacitance
Figure 29. Output Current versus Input Voltage
100 VO = 0.2 V V in , INPUT VOLTAGE (VOLTS) TA = -25C 10 25C 75C
1
0.1
0
10
20
30
40
50
IC, COLLECTOR CURRENT (mA)
Figure 30. Input Voltage versus Output Current
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UMC2NT1, UMC3NT1, UMC5NT1 INFORMATION FOR USING THE SOT-353 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINTS FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process.
SOT-353
0.5 mm (min)
1.9 mm
SOT-353 POWER DISSIPATION one can calculate the power dissipation of the device which The power dissipation of the SOT-353 is a function of in this case is 150 milliwatts. the pad size. This can vary from the minimum pad size for soldering to the pad size given for maximum power 150C - 25C PD = = 150 milliwatts dissipation. Power dissipation for a surface mount device is 833C/W determined by TJ(max), the maximum rated junction The 833C/W for the SOT-353 package assumes the use temperature of the die, RJA, the thermal resistance from of the recommended footprint on a glass epoxy printed the device junction to ambient; and the operating circuit board to achieve a power dissipation of 150 temperature, TA. Using the values provided on the data milliwatts. There are other alternatives to achieving higher sheet, PD can be calculated as follows: power dissipation from the SOT-353 package. Another TJ(max) - TA alternative would be to use a ceramic substrate or an PD = RJA aluminum core board such as Thermal CladTM. Using a The values for the equation are found in the maximum board material such as Thermal Clad, an aluminum core ratings table on the data sheet. Substituting these values board, the power dissipation can be doubled using the same into the equation for an ambient temperature TA of 25C, footprint. SOLDERING PRECAUTIONS * The soldering temperature and time should not exceed The melting temperature of solder is higher than the rated 260C for more than 10 seconds. temperature of the device. When the entire device is heated * When shifting from preheating to soldering, the to a high temperature, failure to complete soldering within maximum temperature gradient should be 5C or less. a short time could result in device failure. Therefore, the * After soldering has been completed, the device should following items should always be observed in order to be allowed to cool naturally for at least three minutes. minimize the thermal stress to which the devices are Gradual cooling should be used as the use of forced subjected. cooling will increase the temperature gradient and * Always preheat the device. result in latent failure due to mechanical stress. * The delta temperature between the preheat and * Mechanical stress or shock should not be applied soldering should be 100C or less.* during cooling. * When preheating and soldering, the temperature of the leads and the case must not exceed the maximum * Soldering a device without preheating can cause temperature ratings as shown on the data sheet. When excessive thermal shock and stress which can result in using infrared heating with the reflow soldering damage to the device. method, the difference should be a maximum of 10C.
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EEE EEE EEE EEE EEE
EEE EEE EEE EEE EEE EEE EEE
0.4 mm (min)
0.65 mm 0.65 mm
UMC2NT1, UMC3NT1, UMC5NT1
SOLDER STENCIL GUIDELINES Prior to placing surface mount components onto a printed circuit board, solder paste must be applied to the pads. A solder stencil is required to screen the optimum amount of solder paste onto the footprint. The stencil is made of brass or stainless steel with a typical thickness of 0.008 inches. The stencil opening size for the surface mounted package should be the same as the pad size on the printed circuit board, i.e., a 1:1 registration.
TYPICAL SOLDER HEATING PROFILE For any given circuit board, there will be a group of control settings that will give the desired heat pattern. The operator must set temperatures for several heating zones, and a figure for belt speed. Taken together, these control settings make up a heating "profile" for that particular circuit board. On machines controlled by a computer, the computer remembers these profiles from one operating session to the next. Figure 31 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. This profile will vary among soldering systems but it is a good starting point. Factors that can affect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. This profile shows temperature versus time. The line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. The two profiles are based on a high density and a low density board. The Vitronics SMD310 convection/infrared reflow soldering system was used to generate this profile. The type of solder used was 62/36/2 Tin Lead Silver with a melting point between 177-189C. When this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. The components on the board are then heated by conduction. The circuit board, because it has a large surface area, absorbs the thermal energy more efficiently, then distributes this energy to the components. Because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joints.
STEP 5 STEP 4 HEATING HEATING ZONES 3 & 6 ZONES 4 & 7 SPIKE" SOAK" 170C 160C STEP 6 STEP 7 VENT COOLING 205 TO 219C PEAK AT SOLDER JOINT
STEP 1 PREHEAT ZONE 1 RAMP" 200C
STEP 2 STEP 3 VENT HEATING SOAK" ZONES 2 & 5 RAMP"
DESIRED CURVE FOR HIGH MASS ASSEMBLIES 150C
150C
100C 100C
140C
SOLDER IS LIQUID FOR 40 TO 80 SECONDS (DEPENDING ON MASS OF ASSEMBLY)
50C
DESIRED CURVE FOR LOW MASS ASSEMBLIES
TIME (3 TO 7 MINUTES TOTAL)
TMAX
Figure 31. Typical Solder Heating Profile
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UMC2NT1, UMC3NT1, UMC5NT1
PACKAGE DIMENSIONS
SC-88A/SOT-323 5-LEAD PACKAGE CASE 419A-01 ISSUE E
G V
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. DIM A B C D G H J K N S V INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 0.012 0.016 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 0.30 0.40
A
5
4
S
1 2 3
-B-
D 5 PL
0.2 (0.008)
M
B
M
N J C
STYLE 6: PIN 1. 2. 3. 4. 5.
EMITTER 2 BASE 2 EMITTER 1 COLLECTOR 1 BASE 1/COLLECTOR 2
H
K
Thermal Clad is a trademark of the Bergquist Company
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
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UMC2NT1/D

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